Bid Summary
I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am an Electronics engineer who is very expertise with VHDL/Verilog.
Project Requirements
Design the CPU with state machine, decoder, register, data instruction, ...
Relevant Skills and Experience
I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm, CPU
Proposed Milestones
$100 USD - the whold work