Design a Floating Point (FP) arithmetic unit in VHDL

Dear sir I have more than 9 years experience in VHDL please check my profile also please message me so that we can disucss

Bid Summary Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. Project Requirements I need to write the vhdl code to describe in circuit the add sub mul in floating point Relevant Skills and Experience First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, Proposed Milestones $250 USD - the whole work

Hello! Please check my reviews to know a bit about me and my work. It would be great if I could help you out work on this project. Thank you!

Bid Summary Dear Sir, I can do this project. I can assure you that if you work with me once, you will always work with me for these kind of projects. Project Requirements specification of the project Relevant Skills and Experience i have skills in VHDL,verilog Proposed Milestones $205 USD - d1

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