Data transfer from PC to FPGA fabric on Xilinx Zedboard

The project requires bring up of a working software/firmware solution on the Xilinx Zedboard ([login to view URL]), and a control reference program on a PC. The project should consists of a PC based software that read a file and send it to the Zynq, using the TCP/IP protocol. The software on the Zynq CPU(ARM) should read the data, feed in inside the FPGA fabric, invert all the bits, and route it back to the to the Zynq CPU and send it to the PC using TCP/IP. The PC software should verify the received data is the same as sent. The data from the PC to the Zynq should be, at least, 500Mbps(mega bit per second). The data send from the PC can be random, read from file, or generated. But it must be suited for verification that what was sent is exactly what is received. The complete source for both the PC project, the Zynq board and the FPGA are needed. All sources should be documented in English to allow understanding of the algorithms used. The resulting project should open, compile and run on our hardware, and work as described. The preferred compiler for the PC program is GCC. The operating system can be either Windows or Linux. A document describing a step-by-step procedure for bringing up the system should be provided with the projects.