Design and Simulation of Combinatorial and Sequential Digital Systems Using VHDL Behavioral Modeling and the Xilinx Vivado Design Suite
$20-90 USD
Cerrado
Publicado hace alrededor de 1 año
$20-90 USD
Pagado a la entrega
1)Using VHDL and the Xilinx Vivado Tools, design and implement a 4-bit ALU whose functionality is compliant with the TTL MSI 74LS381A specifications. The design must use a VHDL behavioral modeling coding style and can include concurrent and sequential statement types. Source code modules must include liberal commenting to clarify and explain function and operation your code.
2) Create a test bench VHDL module and use the Vivado Simulator to test/verify proper operation of the ALU’s functions with all input data patterns specified in the 74LS381A functional table. Recommendation: to make comparison of simulated results to those listed in the functional table easier, apply the external stimulus input patterns in the same “row” order as inputs are listed in the functional table, and configure the radix of outputs as “binary”.
3) Create an XDC file to map your circuit IOs to the Basys3 board. Use slide switches for the 4-bit input data operands, carry in, and functionality mode selection bits (S2-S0). Use LEDs to display the outputs: result and carry out.
4) Synthesize and implement your design in Vivado, then generate bit stream & program the FPGA board.
5) Test and verify the operation of your design on the FPGA board for all arithmetic & logical operations using a subset of input data patterns you choose from the functional table.
Hello dear, We are group of professional VHDL engineer tutors expert and can solve any questions within given time in a very reasonable price because we are in top 2% here so just text me so we can help you out with your task Kind regards
Hi, I'm interested in your project, I'm a professional electrical engineer having more than ten years experience. I'm well versed in VHDL and VIVALDO software. I'm looking forward to your reply.
I am a senior FPGA expert with more than 8 years of experience in designing various digital systems using VHDL/Verilog languages. I have already experience in designing ALU and delivered such projects successfully. I can implement a 4-bit ALU whose functionality is compliant with the TTL MSI 74LS381A specifications using Xilinx vivado tool. I will design the VHDL circuitry and test bench to cover all the input combinations. Same designed 4-bit ALU will be implemented for Basys3 FPGA board with inputs from slide switches and outputs will be displayed on LEDS.
Lets start the project ASAP after having thorough discussion through messages
Hi
Greetings
I am a hardware design engineer and researcher. I have the prior experience in VHDL for FPGA design and implementation . You can check my portfolios for recent projects completion in arithematic and ALU related design. Kindly share your requirement
Hello, I have been working with VHDL projects for more than ten years. I have implemented several ALUs and datapaths so I believe I can deliver youw work with hogh quality.
Looking forward to your positive response and getting your job done.
Hi thank you for your job posting.
I have read your description and understood.
I am a expert for the FPGA and I will satisfy you for this project.
Hope further discussion about your project is more specific.
Thank you.
Happy day. I've worked as a professional website developer for more than 5 years. I can swiftly revamp your website with interactive elements. Knock on chat if quality is your primary priority. PS. I have seen all 10 of the points listed. Best regards Happy day. I've worked as a professional website developer for more than 5 years. I can swiftly revamp your website with interactive elements. Knock on chat if quality is your primary priority. PS. I have seen all 10 of the points listed. Best regards
Hi there
The task in hand is pretty straight forward and in fact I had done something similar for Altera FPGA board.
I have more than 10 years of experience conducting lab work of course Computer Organization & Architecture using VHDL.
I have been a Teaching Assistant during my MS and had helped many students successfully design, build, simulate and execute MIPS 32-bit single cycle microprocessor and others on Altera and Xilinx FPGAs.
I would need to ask couple of questions regarding the task and I will start working on it right away.
Can negotiate on price and time as well.
I had designed something similar in VHDL as well
Statement:
"ALU implementation using your library components"
Using the techniques, you learned from Part 1, implement a single bit ALU shown below using VHDL codes and components in your library.
Your library should include
• Orgate
• Andgate
• Nandgate
• Halfadder
• Fulladder
• mux.