Cerrado

ASIC Design in Verilog

3 freelancers están ofertando el promedio de $187 para este trabajo

Developer000

NO AUTOMATIC BIDDING........................ I am here freelancer first to discuss the details then i can sure about my price and the deadline. My way of working is not only to complete but also to provide enough u Más

$30 USD en 5 días
(13 comentarios)
4.4
$277 USD en 7 días
(0 comentarios)
0.0
vlsirajagopal

6 years industry experience as RTL designer using verilog. Relevant Skills and Experience Had very good industry experience in verilog design. Designed various blocks in part on network switches.

$255 USD en 6 días
(0 comentarios)
0.0