I would like to bid this job because I am really suitable for job description:
First: I am an C++/C/Mathlab/Electronics engineer who is very familiar with C++/C/Mathlab/VHDL/Verilog. In fact, I have done so many project of C/C++VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird.
Especialy, I participated image processoing project: a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Also,,I implemented the image conpression (wavelet transform).
Besides, I have a Zedboard from Xilinx to verify the design. You need Altera FPGA, I have experience in that DE1, DE2. So if you want, I will implement in Zedboard first and I will transfer the desing to FPGA Xilinx.
Finally, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers.. Please contact me and let me know if you want any special requirement.
Thank you.