Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Contratar a Verilog / VHDL Designers

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    17 trabajados encontrados, precios en USD

    Need to investigate the latches, flip-flops and the registers in VHDL laboratory work

    $28 (Avg Bid)
    $28 Oferta Promedio
    1 ofertas
    FPGA U96 speed test 6 días left
    VERIFICADO

    Carry out simple speed test for development board Xilinx U96. Target price is 50 €.

    $124 (Avg Bid)
    $124 Oferta Promedio
    6 ofertas

    I want to hire a person who has an experience in solving problems related to verilog in VLSI design(small work though),has to be experienced in handy usage of software like xilinx/[iniciar sesión para ver URL] for the problem and other info.

    $21 (Avg Bid)
    $21 Oferta Promedio
    5 ofertas

    digital Alarm clock. I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    $98 (Avg Bid)
    $98 Oferta Promedio
    5 ofertas

    I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    $26 (Avg Bid)
    $26 Oferta Promedio
    6 ofertas

    This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus. design simple processor

    $21 (Avg Bid)
    $21 Oferta Promedio
    2 ofertas

    This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus.

    $21 (Avg Bid)
    $21 Oferta Promedio
    1 ofertas

    The first installment of the project dealt with the capability to simulate the actions of four very simple gate types, an INV gate, an AND gate, an OR gate and an XOR (exclusive or) gate. The second installment extended that capability by describing the simple logic gates using Verilog, but the Verilog was restricted to descriptions of circuits which only contained a single gate. For the third ins...

    $48 (Avg Bid)
    $48 Oferta Promedio
    14 ofertas
    OFDM Waveform Development 5 días left
    VERIFICADO

    Need someone to develop OFDM waveform on AD9361 or any other transceiver and FPGA.

    $1082 (Avg Bid)
    $1082 Oferta Promedio
    8 ofertas

    hello, please if you can comment out the verilog code and the steps done, so we know how to explain it. also, i need this project to be done in exactly one week from today. thank you

    $54 (Avg Bid)
    $54 Oferta Promedio
    6 ofertas
    HEVC implementation 3 días left
    VERIFICADO

    anyone having knowledge on HEVC can reach out to me

    $13 / hr (Avg Bid)
    $13 / hr Oferta Promedio
    3 ofertas
    Design a circuit in Xilinx 3 días left
    VERIFICADO

    Design a circuit in Xilinx that takes these inputs and outputs according to the table below

    $29 (Avg Bid)
    $29 Oferta Promedio
    8 ofertas

    Need someone know well vhdl ............................. ............................. .............................

    $33 (Avg Bid)
    $33 Oferta Promedio
    13 ofertas
    linux build for red pitaya 1 día left
    VERIFICADO

    https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841738/Getting+Started [iniciar sesión para ver URL] Linux build and application development for simple LED blink project.

    $225 (Avg Bid)
    $225 Oferta Promedio
    3 ofertas

    I have an application that I want to run on, Field programmable array gates (FPGAs) architecture using the parallel programming language OpenCL. The software and the FPGAs board I am using are from Xilinx company. The OpenCL compiler is Xilinx SDSoC OpneCL. I need help with optimising the code using the OpenCL and FPGAs methods to run the code faster. I have already tried that but I am not happy ...

    $198 (Avg Bid)
    $198 Oferta Promedio
    7 ofertas
    Trophy icon VHDL Bitcoin 4 horas left

    I would like to perform a hash of a simple 'abc' message, using the bitcoin hashing algorithm (proof of work) using the vhdl coding on modelsim. And also having the design to implement it on FPGA

    $226 (Avg Bid)
    $226
    1 participaciones
    CMOS Digital Integrated Circuit 1 hora left
    VERIFICADO

    Need help in VLSI design Apart from the report, the WinSpice circuit files is also needed. If you have knowledge of above, let me know. I will share details with you.

    $30 - $50
    Sellado
    $30 - $50
    3 ofertas